AMD LX 800@0.9W Computer Hardware User Manual


 
586 AMD Geode™ LX Processors Data Book
GeodeLink™ PCI Bridge Register Descriptions
33234H
6.16.2.7 GLPCI Fixed Region Configuration C0-DF (GLPCI_C0)
GLPCI_A0 Bit Descriptions
Bit Name Description (Note 1)
63:56 BC BC Properties. Region properties for BC000 through BFFFF.
55:48 B8 B8 Properties. Region properties for B8000 through BBFFF.
47:40 B4 B4 Properties. Region Properties for B4000 through B7FFF.
39:32 B0 B0 Properties. Region properties for B0000 through B3FFF.
31:24 AC AC Properties. Region properties for AC000 through AFFFF.
23:16 A8 A8 Properties. Region Properties for A8000 through ABFFF.
15:8 A4 A4 Properties. Region Properties for A4000 through A7FFF.
7:0 A0 A0 Properties. Region properties for A0000 through A3FFF.
Note 1. See Table 6-93 for region properties bit decodes.
Table 6-93. Region Properties
Bit Name Description
7:6 RSVD (RO) Reserved (Read Only). Reserved for future use.
5PF Prefetchable. Reads to this region have no side-effects.
4WC Write Combine. Writes to this region may be combined.
3 RSVD (RO) Reserved (Read Only). Reserved for future use.
2WP Write Protect. When set to 1, only read accesses are allowed. Write accesses are
ignored (master abort).
1DD Discard Data. When set to 1, write access are accepted and discarded. Read accesses
are ignored (master abort).
0CD Cache Disable. When set to 1, accesses are marked as non-coherent. When cleared to
0, accesses are marked as coherent.
MSR Address 50002016h
Typ e R /W
Reset Value 00000000_00000000h
GLPCI_C0 Register Map
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
DC D8 D4 D0
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
CC C8 C4 C0
GLPCI_C0 Bit Descriptions
Bit Name Description (Note 1)
63:56 DC DC Properties. Region properties for DC000 through DFFFF.
55:48 D8 D8 Properties. Region properties for D8000 through DBFFF.
47:40 D4 D4 Properties. Region Properties for D4000 through D7FFF.