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626 AMD Geode™ LX Processors Data Book
Instruction Set
33234H
8.1.5.3 Base Field (s-i-b Present)
In Table 8-8 on page 622, the note “s-i-b is present” for certain entries forces the use of the mod and base field as listed in
Table 8-15. The first two digits in the first column of Table 8-15 identify the mod bits in the mod r/m byte. The last three digits
in the second column of this table identify the base fields in the s-i-b byte.
Table 8-15. mod base Field Encoding
mod Field within mod/rm
Byte (bits[7:6])
base Field within s-i-b
Byte (bits [2:0])
32-Bit Address Mode with mod r/m and s-i-b
Bytes Present
00 000 DS:[EAX+(scaled index)]
00 001 DS:[ECX+(scaled index)]
00 010 DS:[EDX+(scaled index)]
00 011 DS:[EBX+(scaled index)]
00 100 SS:[ESP+(scaled index)]
00 101 DS:[d32+(scaled index)]
00 110 DS:[ESI+(scaled index)]
00 111 DS:[EDI+(scaled index)]
01 000 DS:[EAX+(scaled index)+d8]
01 001 DS:[ECX+(scaled index)+d8]
01 010 DS:[EDX+(scaled index)+d8]
01 011 DS:[EBX+(scaled index)+d8]
01 100 SS:[ESP+(scaled index)+d8]
01 101 SS:[EBP+(scaled index)+d8]
01 110 DS:[ESI+(scaled index)+d8]
01 111 DS:[EDI+(scaled index)+d8]
10 000 DS:[EAX+(scaled index)+d32]
10 001 DS:[ECX+(scaled index)+d32]
10 010 DS:[EDX+(scaled index)+d32]
10 011 DS:[EBX+(scaled index)+d32]
10 100 SS:[ESP+(scaled index)+d32]
10 101 SS:[EBP+(scaled index)+d32]
10 110 DS:[ESI+(scaled index)+d32]
10 111 DS:[EDI+(scaled index)+d32]