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AMD Geode™ LX Processors Data Book 223
GeodeLink™ Memory Controller Register Descriptions
33234H
6.2.2 GLMC Specific MSRs
6.2.2.1 Row Addresses Bank0 DIMM0, Bank1 DIMM0 (MC_CF_BANK01)
6.2.2.2 Row Addresses Bank2 DIMM0, Bank3 DIMM0 (MC_CF_BANK23)
MSR Address 20000010h
Typ e RO
Reset Value xxxxxxxx_xxxxxxxxh
MC_CF_BANK01 Register Map
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
RSVD MC_CF_BANK1
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
RSVD MC_CF_BANK0
MC_CF_BANK01 Bit Descriptions
Bit Name Description
63:54 RSVD Reserved. Reads back as 0.
53:32 MC_CF_BANK1 Memory Configuration Back 1. Open row address (31:10) for Bank1, DIMM0.
31:22 RSVD Reserved. Reads back as 0.
21:0 MC_CF_BANK0 Memory Configuration Back 0. Open row address (31:10) for Bank0, DIMM0.
MSR Address 20000011h
Typ e RO
Reset Value xxxxxxxx_xxxxxxxxh
MC_CF_BANK23 Register Map
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
RSVD MC_CF_BANK3
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
RSVD MC_CF_BANK2
MC_CF_BANK23 Bit Descriptions
Bit Name Description
63:54 RSVD Reserved. Reads back as 0.
53:32 MC_CF_BANK3 Memory Controller Configuration Bank 3. Open row address (31:10) for Bank3,
DIMM0.
31:22 RSVD Reserved. Reads back as 0.
21:0 MC_CF_BANK2 Memory Controller Configuration Bank 2. Open row address (31:10) for Bank2,
DIMM0.