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260 AMD Geode™ LX Processors Data Book
Graphics Processor Register Definitions
33234H
6.4.2.3 Vector Error (GP_VEC_ERR)
This register specifies the axial and diagonal error terms used by the Bresenham vector algorithm. GP_VEC_ERR shares
the same storage space as GP_SRC_OFFSET and thus a write to one of these registers will be reflected in both, since
they both have the same offset. The name change is only for documentation purposes.
6.4.2.4 Stride (GP_STRIDE)
The GP_STRIDE register is used to indicate the byte width of the destination and source images. Whenever the Y coordi-
nate is incremented, this value is added to the previous start address to generate the start address for the next line. Stride
values up to 64 KB minus one are supported. Adding the GP_STRIDE to the OFFSET gives the byte address for the first
pixel of the next line of a BLT. In the case of monochrome source, the XLSBs specified in the GP_SRC_OFFSET register
are used to index into the first byte of every line to extract the first pixel.
Note that the Display Controller may not support variable strides for on-screen space, especially when compression is
enabled. Refer to DC Memory Offset 034h[15:0] for frame buffer pitch. Display Controller restrictions do not apply to source
stride.
When copying from on-screen frame buffer space (e.g., window move), the values of S_STRIDE and D_STRIDE should
match. When copying from off-screen space, S_STRIDE should be the number of bytes to add to get from one line in the
source bitmap to the next. This allows software to linearly pack a bitmap into off-screen space (e.g., for an 800x600 mono-
chrome bitmap packed linearly into off-screen space, bytes per line is 100, so S_STRIDE should be written with 100).
25:24 RSVD Reserved. Write as read.
23:0 OFFSET Offset. Offset from the source base address to the first source pixel.
GP Memory Offset 04h
Typ e R /W
Reset Value 00000000h
GP_SRC_OFFSET Bit Descriptions (Continued)
Bit Name Description
GP_VEC_ERR Register Map
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
A_ERR D_ERR
GP_VEC_ERR Bit Description
Bit Name Description
31:16 A_ERR Axial Error Term. Axial error term (2’s complement format).
15:0 D_ERR Diagonal Error Term. Diagonal error term (2’s complement format).
GP Memory Offset 08h
Typ e R /W
Reset Value 00000000h
GP_STRIDE Register Map
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
S_STRIDE D_STRIDE