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204 AMD Geode™ LX Processors Data Book
CPU Core Register Descriptions
33234H
5.5.2.120 FPU Busy MSR (FPU_BUSY_MSR)
5.5.2.121 FPU Register Map MSR (FPU_MAP_MSR)
FPU_TW_MSR Bit Descriptions
Bit Name Description
63:16 RSVD Reserved. Write as read.
15:0 FPU_TW FPU Tag Word.
MSR Address 00001A13h
Typ e RO
Reset Value 00000000_00000000h
FPU_BUSY_MSR Register Map
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
RSVD
313029282726252423222120191817161514131211109876543210
RSVD
FPU_BUSY
FPU_BUSY_MSR Bit Descriptions
Bit Name Description
63:1 RSVD Reserved. Reads back as 0.
0FPU_BUSY FPU Busy. Software must check that the FPU is Idle before accessing MSRs
00001A10h-00001A12h and 00001A40h-00001A6Fh.
0: FPU Idle.
1: FPU Busy.
MSR Address 00001A14h
Typ e RO
Reset Value 00000000_76543210h
FPU_MAP_MSR Register Map
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
RSVD
313029282726252423222120191817161514131211109876543210
FPU_REG_MAP
FPU_MAP_MSR Bit Descriptions
Bit Name Description
63:32 RSVD Reserved.
31:0 FPU_REG_MAP FPU Register Map. Internal mapping of architectural registers to physical registers in the
register array.