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9.5PowerManagement
9.5.1V
DD
3.3VI/OPower-DownControl
9.6SpecialPeripheralStatusandControl
9.6.1UniversalSerialBus(USB)InterfaceControl
9.6.2HostPortInterface(HPI)Control
9.6.3VideoClockControlandDisable
9.6.4TransportStreamInterface(TSIF)Control
9.6.5VideoSourceClockControlandDisable
9.6.6PWMControl
9.6.7EDMA3TransferController(EDMA3TC)BurstSizeConfiguration
PowerManagement
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TheVDD3.3VI/Opower-downcontrolregister(VDD3P3V_PWDN)intheSystemModulecontrolspower
tothe3.3VI/Ocells.The3.3VI/Osareseparatedintotwogroupsforindependentcontrol.Seethe
device-specificdatamanualfordetailsonVDD3P3V_PWDN.
SeveraloftheDM646xDMSoCperipheralsrequireadditionalsystem-levelcontrollogic.Thoseregisters
arediscussedinthissection.
TheUSBcontrolregister(USBCTL)controlsvariousfeaturesoftheUSBinterface.Seethedevice-specific
datamanualfordetailsonUSBCTL.
TheHPIcontrolregister(HPICTL)controlswriteaccesstotheHPIcontrolandaddressregistersand
determinesthehosttime-outvalue.HPICTLalsodeterminestheoutputmodeoftheHRDYsignal.
HPICTLisnotresetbyasoftreset,sothattheHPIwidthremainscorrectlyconfigured.Seethe
device-specificdatamanualfordetailsonHPICTL.
Thevideoclockcontrolregister(VIDCLKCTL)allowsyoutoselect/controltheclockmultiplexingforthe
videochannel(channels1,2,and3)outputclocksource.Seethedevice-specificdatamanualfordetails
onVIDCLKCTL.
TheTSIFcontrolregister(TSIFCTL)allowsyoutoselect/controltheclockmultiplexingforthecounterand
serialoutputofTSIF1andthecounterandparallel/serialoutputforTSIF0.Seethedevice-specificdata
manualfordetailsonTSIFCTL.
Thevideosourceclockdisableregister(VSCLKDIS)allowsyoutodisabletheselectedvideoport
interface(VPIF),transportstreaminterface(TSIF),andclockreferencegenerator(CRGEN)moduleinput
clocks.Seethedevice-specificdatamanualfordetailsonVSCLKDIS.
Note:Toensureglitch-freeoperation,theclockshouldbedisabledbeforechangingtheclock
sourcefrequencyormultiplexingusingthevideoclockcontrolregister(VIDCLKCTL)andthe
TSIFcontrolregister(TSIFCTL).
ThePWMcontrolregister(PWMCTL)controlsthechip-levelconnectionsofPWM0andPWM1.See
device-specificdatamanualfordetailsonPWMCTL.
TheEDMAtransfercontrollerdefaultburstsizeconfigurationregister(EDMATCCFG)configuresthe
defaultburstsize(DBS)fortheEDMAtransfercontrollers(EDMA3TC0,EDMA3TC1,EDMA3TC2,and
EDMA3TC3).Seethedevice-specificdatamanualfordetailsonEDMATCCFG.
SystemControlModule 106SPRUEP9A–May2008
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