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7.4.2DSPSleepModes
ARMandDSPSleepModeManagement
www.ti.com
Thefollowingsequencedescribestheproceduretowakeupfromthewait-for-interruptmode:
•Towakeupfromthewait-for-interruptmode,triggeranyenabledinterrupt(forexample,anexternal
interrupt).
•TheARM’sPCjumpstotheIRQvectorandyoumusthandletheinterruptinaninterruptservice
routine(ISR).
ExittheISRandcontinuenormalprogramexecutionstartingfromtheinstructionimmediatelyfollowingthe
instructionthatenabledwait-for-interruptmode:mcrp15,#0,r3,c7,c0,#4.
Note:TheARMinterruptcontrollerandthemodulesourcingthewakeupinterrupt(forexample,
GPIOorwatchdogtimer)mustnotbedisabled;otherwise,thedevicewillneverwakeup.
Formoreinformationonthissleepmode,refertotheARM926EJ-STechnicalReference
Manual,whichisavailablefromARMLtd.atwww.arm.com.
TheC64x+megamoduleoftheDSPsubsystemincludesapower-downcontroller(PDC).Thepower-down
controllercanpower-downallofthefollowingcomponentsoftheC64x+megamoduleandinternal
memoriesoftheDSPsubsystem:
•C64x+CPU
•ProgramMemoryController(PMC)
•DataMemoryController(DMC)
•UnifiedMemoryController(UMC)
•ExtendedMemoryController(EMC)
•L1PMemory
•L1DMemory
•L2Memory
AlthoughtheC64x+megamoduledocumentationmentionsbothdynamicandstaticpower-down,the
DM646xDMSoCsupportsonlystaticpower-down.
•Staticpower-down:PDCinitiatespower-downoftheentireC64x+megamoduleandallinternal
memoriesimmediatelyuponcommandfromsoftware.
Staticpower-downaffectsallcomponentsoftheC64x+megamoduleandallinternalmemories.Software
caninitiatestaticpower-downviaaregisterbitinthePDCregister.
FormoreinformationontheDSPsubsystem,seetheTMS320DM646xDMSoCDSPSubsystem
ReferenceGuide(SPRUEP8).
82PowerManagementSPRUEP9A–May2008
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