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5.4.8BypassDividerRegister(BPDIV)
5.4.9PLLControllerCommandRegister(PLLCMD)
PLLControllerRegisterMap
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Thebypassdividerregister(BPDIV)isshowninFigure5-11anddescribedinTable5-12.Bypassdivider
controlsthedividerforSYSCLKBP.BPDIVisnotusedonPLL2.
Figure5-11.BypassDividerRegister(BPDIV)
3116
Reserved
R-0
1514540
BPDENReservedRATIO
R/W-1R-0R/W-0
LEGEND:R/W=Read/Write;R=Readonly;-n=valueafterreset
Table5-12.BypassDividerRegister(BPDIV)FieldDescriptions
BitFieldValueDescription
31-16Reserved0Reserved
15BPDENBypassdividerenable.
0Disable
1Enable
14-5Reserved0Reserved
4-0RATIO0-1FhDividerratio.DividerValue=RATIO+1.RATIOdefaultsto0(PLLdivideby1).
ThePLLcontrollercommandregister(PLLCMD)isshowninFigure5-12anddescribedinTable5-13.
Containscommandbitsforvariousoperations.Writesof1initiatecommand;writesof0clearthebit,but
havenoeffect.
Figure5-12.PLLControllerCommandRegister(PLLCMD)
3116
Reserved
R-0
1510
ReservedGOSET
R-0R/W0C-0
LEGEND:R/W=Read/Write;R=Readonly;W0C=Write0toclearbit;-n=valueafterreset
Table5-13.PLLControllerCommandRegister(PLLCMD)FieldDescriptions
BitFieldValueDescription
31-1Reserved0Reserved
0GOSETGObitforSYSCLKnphasealignment.
0Clearbit(noeffect)
1Phasealignment
PLLController 52SPRUEP9A–May2008
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