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7.5I/OManagement
7.5.13.3VI/OPower-Down
7.6USBPhyPowerDown
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I/OManagement
The3.3VI/Odriversarefabricatedoutof1.8VtransistorswithdesigntechniquesthatrequireaDCbias
current.TheseI/Ocellshaveapower-downmodethatturnsofftheDCcurrent.TheVDD3P3V_PWDN
registerintheSystemModulecontrolspowertothe3.3VI/Ocells.The3.3VI/Osareseparatedinto
functionalgroupsforindependentcontroldifferentmodules.Forthesegroups,onlytheI/Ocellsneeded
forHost/AEMIFbootorpowerupoperationsarepoweredupbydefault(CLKOUT,bootconfigurationpins,
PCI/HPI/AEMIFBlocks,GPIOBlock).AllotherI/Ocellsarepowereddownbydefaulttosavepower.
Note:IfanyoftheseI/Opinsareneededfortheapplication,besurethatapplicationcodestarts
outbyprogrammingthecorrespondingbitsinVDD3P3V_PWDNto0topoweruptheI/O
cells.
Seethedevice-specificdatamanualfordetailsontheVDD3P3V_PWDNregister.
Youcanpower-downtheUSBPhyperipheralwhenitisnotinuse.TheUSBPhyispowered-downviathe
PHYPDWNbitintheUSBCTLregisterofthesystemcontrolmodule.USBCTLisdescribedinthe
device-specificdatamanual.
SPRUEP9A–May2008PowerManagement83
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