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4.2.2.4PeripheralComponentInterface(PCI)
4.2.2.5HostPortInterface(HPI)
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MemoryInterfacesOverview
ThePCImoduleallowscommunicationwithdevicescomplainttothePCILocalBusSpecification(revision
2.3)viaa32-bitaddress/databusoperatingatspeedsupto33MHZ.
ThePCImodulesupportsthefollowingfeatures:
•PCILocalBusSpecification(revision2.3)compliant
•SinglefunctionPCIinterfaceprovided
•32-bitaddress/databuswidth
•Operationupto33MHZ
•Optimizedburstbehaviorsupportedforsystemcachelinesizesof16,32,64and128bytes
•PCIisonlyaccessiblefromtheARM
TheHPIprovidesaparallelportinterfacethroughwhichanexternalhostprocessorcandirectlyaccess
theTMS320DM646xDMSoCprocessor'sresources(configurationandprogram/datamemories).The
externalhostdeviceisasynchronoustotheCPUclockandfunctionsasamastertotheHPIinterface.The
HPIenablesahostdeviceandtheDM646xDMSoCprocessortoexchangeinformationviainternalor
externalmemory.Dedicatedaddress(HPIA)anddata(HPID)registerswithintheHPIprovidethedata
pathbetweentheexternalhostinterfaceandtheprocessorresources.AnHPIcontrolregister(HPIC)is
availabletothehostandtheCPUforvariousconfigurationandinterruptfunctions.
TheHPIsupportsthefollowingfeatures:
•Multiplexedaddress/data
•Dual16-bithalfwordcycleaccess(internaldatawordis32-bitswide)
•16-bit-widehostdatabusinterface
•Internaldataburstingusing8-wordreadandwritefirst-in,first-out(FIFO)buffers
•HPIcontrolregister(HPIC)accessiblebyboththeARMCPUandtheexternalhost
•HPIaddressregister(HPIA)accessiblebyboththeARMCPUandtheexternalhost
•SeparateHPIaddressregistersforread(HPIAR)andwrite(HPIAW)withconfigurableoptionfor
operatingasasingleHPIaddressregister
•HPIdataregister(HPID)/FIFOsprovidingdata-pathbetweenexternalhostinterfaceandCPU
resources
•Multiplestrobesandcontrolsignalstoallowflexiblehostconnection
•AsynchronousHRDYoutputtoallowtheHPItoinsertwaitstatestothehost
•SoftwarecontrolofdataprefetchingtotheHPID/FIFOs
•Processor-to-HostinterruptoutputsignalcontrolledbyHPICaccesses
•Host-to-ProcessorinterruptcontrolledbyHPICaccesses
•RegistercontrolledHPIAandHPICownershipandFIFOtimeout
•Memory-mappedperipheralidentificationregister(PID)
•Busholdersonhostdataandaddressbuses(theseareactuallyexternaltoHPImodule)
•32-bitwordcycleaccess(internaldatawordis32-bitswide)
•32-bit-widehostdatabusinterface
SPRUEP9A–May2008SystemMemory33
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