8.4.13InterruptPriorityRegister2(INTPRI2)
8.4.14InterruptPriorityRegister3(INTPRI3)
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AINTCRegisters
Theinterruptpriorityregister2(INTPRI2)isshowninFigure8-17anddescribedinTable8-15.
Figure8-17.InterruptPriorityRegister2(INTPRI2)
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ReservedINT23ReservedINT22ReservedINT21ReservedINT20
R-0R/W-7hR-0R/W-7hR-0R/W-7hR-0R/W-7h
15141211108764320
ReservedINT19ReservedINT18ReservedINT17ReservedINT16
R-0R/W-7hR-0R/W-7hR-0R/W-7hR-0R/W-7h
LEGEND:R/W=Read/Write;R=Readonly;-n=valueafterreset
Table8-15.InterruptPriorityRegister2(INTPRI2)FieldDescriptions
BitFieldValueDescription
Reserved0Reserved
INTn0-7hSelectsINTnprioritylevel.
Theinterruptpriorityregister3(INTPRI3)isshowninFigure8-18anddescribedinTable8-16.
Figure8-18.InterruptPriorityRegister3(INTPRI3)
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ReservedINT31ReservedINT30ReservedINT29ReservedINT28
R-0R/W-7hR-0R/W-7hR-0R/W-7hR-0R/W-7h
15141211108764320
ReservedINT27ReservedINT26ReservedINT25ReservedINT24
R-0R/W-7hR-0R/W-7hR-0R/W-7hR-0R/W-7h
LEGEND:R/W=Read/Write;R=Readonly;-n=valueafterreset
Table8-16.InterruptPriorityRegister3(INTPRI3)FieldDescriptions
BitFieldValueDescription
Reserved0Reserved
INTn0-7hSelectsINTnprioritylevel.
SPRUEP9A–May2008ARMInterruptController(AINTC)99
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