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5.4.12PLLDIVRatioChangeStatusRegister(DCHANGE)
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PLLControllerRegisterMap
ThePLLDIVratiochangestatusregister(DCHANGE)isshowninFigure5-15anddescribedin
Table5-16.IndicatesifSYSCLKndivideratiohasbeenmodified.
Note:OntheDM646xDMSoC,allPLL1SYSCLKndividersareprogrammablebutyoushouldnot
changethedividervaluetomaintaintheclockratiosbetweenvariousmodulesofthedevice.
Youshouldonlyusethepower-updefaultdividervaluesforallPLL1SYSCLKndividersfor
normaldeviceoperation.
PLL2SYSCLK1dividervalueisprogrammableandyoumaychangethedividervalueforthe
desiredDDR2memorycontrollerclockfrequency.
Figure5-15.PLLDIVRatioChangeStatusRegister(DCHANGE)
3116
Reserved
R-0
159876543210
ReservedSYS9
(1)
SYS8
(1)
RsvdSYS6
(1)
SYS5
(1)
SYS4
(1)
SYS3
(1)
SYS2
(1)
SYS1
R-0R-0R-0R-0R-0R-0R-0R-0R-0R-0
LEGEND:R=Readonly;-n=valueafterreset
(1)
ForPLL1only,notsupportedforPLL2.
Table5-16.PLLDIVRatioChangeStatusRegister(DCHANGE)FieldDescriptions
BitFieldValueDescription
31-9Reserved0Reserved
8SYS9SYSCLK9divideratioismodified.SYSCLK9divideratioischangedduringGOoperation.ForPLL1
only,notsupportedforPLL2.
0Ratiohasnotbeenmodified.WhentheGOSETbitinthePLLcontrollercommandregister(PLLCMD)is
set,SYSCLK9isnotaffected.
1Ratiohasbeenmodified.WhentheGOSETbitinthePLLcontrollercommandregister(PLLCMD)is
set,SYSCLK9changestothenewdivideratio.
7SYS8SYSCLK8divideratioismodified.SYSCLK8divideratioischangedduringGOoperation.ForPLL1
only,notsupportedforPLL2.
0Ratiohasnotbeenmodified.WhentheGOSETbitinthePLLcontrollercommandregister(PLLCMD)is
set,SYSCLK8isnotaffected.
1Ratiohasbeenmodified.WhentheGOSETbitinthePLLcontrollercommandregister(PLLCMD)is
set,SYSCLK8changestothenewdivideratio.
6Reserved0Reserved
5SYS6SYSCLK6divideratioismodified.SYSCLK6divideratioischangedduringGOoperation.ForPLL1
only,notsupportedforPLL2.
0Ratiohasnotbeenmodified.WhentheGOSETbitinthePLLcontrollercommandregister(PLLCMD)is
set,SYSCLK6isnotaffected.
1Ratiohasbeenmodified.WhentheGOSETbitinthePLLcontrollercommandregister(PLLCMD)is
set,SYSCLK6changestothenewdivideratio.
4SYS5SYSCLK5divideratioismodified.SYSCLK5divideratioischangedduringGOoperation.ForPLL1
only,notsupportedforPLL2.
0Ratiohasnotbeenmodified.WhentheGOSETbitinthePLLcontrollercommandregister(PLLCMD)is
set,SYSCLK5isnotaffected.
1Ratiohasbeenmodified.WhentheGOSETbitinthePLLcontrollercommandregister(PLLCMD)is
set,SYSCLK5changestothenewdivideratio.
SPRUEP9A–May2008PLLController55
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