Filter
Top Products
6.5.2InterruptRegisterBits
6.5.3InterruptHandling
PSCInterrupts
www.ti.com
ThePSCinterruptenablebitsaretheEMUIHBIEbitandtheEMURSTIEbitinthemodulecontroln
register(MDCTLn).
Note:TointerrupttheARM,theARM’spowerandsleepcontrollerinterrupt(PSCINT)mustalsobe
enabledintheARMinterruptcontroller(AINTC).SeeChapter8formoreinformationonthe
ARMinterruptcontroller.
ThePSCinterruptstatusbitsaretheM[n]bitsinthemoduleerrorpendingregistern(MERRPRn),andthe
EMUIHBbitandtheEMURSTbitinthemodulestatusnregister(MDSTATn).Thestatusbitsin
MERRPR0andMERRPR1arereadbysoftwaretodeterminewhichmodulehasgeneratedanemulation
interrupt,andthensoftwarecanreadthecorrespondingstatusbitsinMDSTATntodeterminewhichevent
causedtheinterrupt.
ThePSCinterruptclearbitsaretheM[n]bitsinthemoduleerrorclearregistern(MERRCRn).
ThePSCinterruptevaluationbitistheALLEVbitintheinterruptevaluationregister(INTEVAL).Whenset,
thisbitforcesthePSCinterruptlogictore-evaluateeventstatus.Ifanyeventsarestillactive(ifanystatus
bitsareset)whentheALLEVbitinINTEVALissetto1,thePSCINTisreassertedtotheARMinterrupt
controller.SettheALLEVbitinINTEVALbeforeexitingyourPSCINTinterruptserviceroutinetoensure
thatyoudonotmissanyPSCinterruptswhiletheARMinterruptsaregloballydisabled.
SeeSection6.6forcompletedescriptionsofallPSCregisters.
HandlethePSCinterruptsasdescribedinthefollowingprocedure:
Enabletheinterrupt.
1.SettheEMUIHBIEbitandtheEMURSTIEbitinthemodulecontrolnregister(MDCTLn)toenablethe
interrupteventsthatyouwant.
2.EnabletheARMpowerandsleepcontrollerinterrupt(PSCINT)intheARMinterruptcontroller.To
interrupttheARM,PSCINTmustbeenabledintheARMinterruptcontroller.SeeChapter8formore
information.
TheARMenterstheinterruptserviceroutine(ISR)whenitreceivestheinterrupt.
1.ReadtheM[n]bitinthemoduleerrorpendingregistern(MERRPRn)todeterminethesourceofthe
interrupt(s).
2.Foreachactiveeventthatyouwanttoservice:
•Readtheeventstatusbitsinthemodulestatusnregister(MDSTATn),dependingonthestatus
bitsreadintheprevioussteptodeterminetheeventthatcausedtheinterrupt.
•Servicetheinterruptasrequiredbyyourapplication.
•Writea1totheM[n]bitinthemoduleerrorclearregistern(MERRCRn)toclearcorresponding
status.
•SettheALLEVbitintheinterruptevaluationregister(INTEVAL).Settingthisbitreassertsthe
PSCINTtotheARMinterruptcontroller,iftherearestillanyactiveinterruptevents.
68PowerandSleepController(PSC)SPRUEP9A–May2008
SubmitDocumentationFeedback