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3.7Tightly-CoupledMemory
Tightly-CoupledMemory
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TheARM926EJ-Shasatightly-coupledmemoryinterfaceenablingseparateinstructionanddataTCMto
beinterfacedtotheARM.TCMsaremeantforstoringreal-timeandperformancecriticalcode.
TheDM646xDMSoCsupportsbothinstructionTCM(I-TCM)anddataTCM(D-TCM).Theinstruction
TCMislocatedat0000:0000hto0000:9FFFh;thedataTCMislocatedat0001:0000hto0001:9FFFh,as
showninTable3-3.
Table3-3.ITCM/DTCMMemoryMap
I-TCMAddressD-TCMAddressSize(Bytes)Description
0000:0000h-0000:3FFFh0001:0000h-0001:3FFFh16KRAM0
0000:4000h-0000:7FFFh0001:4000h-0001:7FFFh16KRAM1
0000:8000h-0000:9FFFh0001:8000h-0001:9FFFh8KROM
0000:A000h-0000:FFFFh0001:A000h-0001:FFFFh24KReserved
ThestatusoftheTCMmemoryregionscanbereadfromtheTCMstatusregister,whichisCP15register
0.TheinstructionforreadingtheTCMstatusis:
MRCp15,#0,Rd,c0,c0,#2;readTCMstatusregister
whereRdisanyregisterwherethestatusdataisreadintotheregister.
TheformatofthedataintheTCMstatusregisterisshowninFigure3-1.
Figure3-1.TCMStatusRegister
311716
ReservedDTCM
1510
ReservedITCM
Table3-4.TCMStatusRegisterFieldDescriptions
BitFieldValueDescription
31-17Reserved0Reserved
16DTCMDataTCM.
0DataTCMisnotpresent.
1DataTCMispresent.
15-1Reserved0Reserved
0ITCMInstructionTCM.
0InstructionTCMisnotpresent.
1InstructionTCMispresent.
26ARMCoreSPRUEP9A–May2008
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