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5.2.2.1InitializationtoPLLModefromPLLPowerDown
5.2.2.2ChangingPLLMultiplier
PLL1Control
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IfthePLLispowereddown(PLLPWRDNbitinPLLCTLissetto1),followthisproceduretochangethe
PLL1frequencies.TherecommendationistostopallperipheraloperationbeforechangingthePLL1
frequency,withtheexceptionoftheARMandDDR2memorycontroller.TheARMmustbeoperationalto
programthePLLcontroller.TheDDR2memorycontrolleroperatesoffoftheclockfromPLLC2.
1.SelecttheclockmodebyprogrammingtheCLKMODEbitinPLLCTL.
2.BeforechangingthePLLfrequency,switchtoPLLbypassmode:
a.ClearthePLLENSRCbitinPLLCTLto0toallowPLLCTL.PLLENtotakeeffect.
b.ClearthePLLENbitinPLLCTLto0(selectPLLbypassmode).
c.Waitfor20MXIclockcyclestoensurePLLCswitchestobypassmodeproperly.
3.SetthePLLRSTbitinPLLCTLto1(resetPLL).
4.SetthePLLDISbitinPLLCTLto1(disablePLLoutput).
5.ClearthePLLPWRDNbitinPLLCTLto0tobringthePLLoutofpower-downmode.
6.ClearthePLLDISbitinPLLCTLto0(enablethePLL)toallowPLLoutputstostarttoggling.Notethat
thePLLCisstillatPLLbypassmode;therefore,thetogglingPLLoutputdoesnotgetpropagatedto
therestofthedevice.
7.WaitforPLLstabilizationtime.(4096MXIclockcycles)
8.ProgramtherequiredmultipliervalueinthePLLmultipliercontrolregister(PLLM).
9.WaitforPLLtoresetproperly.ThePLLresettimeisaminimumof32MXIclockcycles.
10.ClearthePLLRSTbitinPLLCTLto0tobringthePLLoutofreset.
11.Waitfor2000MXIclockorreferenceclockcyclestoallowPLLtolock.
12.SetthePLLENbitinPLLCTLto1toremovethePLLfrombypassmode.
IfthePLLisnotpowereddown(PLLPWRDNbitinPLLCTLisclearedto0)andthePLLstabilizationtime
ispreviouslymet(step7inSection5.2.2.1),followthisproceduretochangePLL1multiplier.The
recommendationistostopallperipheraloperationbeforechangingthePLLmultiplier,withtheexception
oftheARMandDDR2memorycontroller.TheARMmustbeoperationaltoprogramthePLLcontroller.
TheDDR2memorycontrolleroperatesoffoftheclockfromPLLC2.
1.BeforechangingthePLLfrequency,switchtoPLLbypassmode:
a.ClearthePLLENSRCbitinPLLCTLto0toallowPLLCTL.PLLENtotakeeffect.
b.ClearthePLLENbitinPLLCTLto0(selectPLLbypassmode).
c.Waitfor20MXIclockcyclestoensurePLLCswitchestobypassmodeproperly.
2.SetthePLLRSTbitinPLLCTLto1(resetPLL).
3.ClearthePLLDISbitinPLLCTLto0(enablethePLL)toallowPLLoutputstostarttoggling.Notethat
thePLLCisstillatPLLbypassmode;therefore,thetogglingPLLoutputdoesnotgetpropagatedto
therestofthedevice.
4.ProgramtherequiredmultipliervalueinthePLLmultipliercontrolregister(PLLM).
5.WaitforPLLtoresetproperly.ThePLLresettimeisaminimumof32MXIclockcycles.
6.ClearthePLLRSTbitinPLLCTLto0tobringthePLLoutofreset.
7.Waitfor2000MXIclockorreferenceclockcyclestoallowPLLtolock.
8.SetthePLLENbitinPLLCTLto1toremovethePLLfrombypassmode.
40PLLControllerSPRUEP9A–May2008
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