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10.3.7TestandEmulationReset(TRSTpin)
10.4DefaultDeviceConfigurations
10.4.1DeviceConfigurationPins
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DefaultDeviceConfigurations
ThisistheTestresetonJTAGinterface.DrivetheTRSTpinlowtokeepthetestandemulationlogicin
reset.TRSTneedstobereleased(pulledhigh)wheneveritisnecessarytouseaJTAGcontrollerto
debugthedevice.YoucanpulltheTRSTpinhighontheboardifemulationisrequired.
AfterPOR,Warmreset,andMaxreset,thechipisinitsdefaultconfiguration.Thissectionhighlightsthe
defaultconfigurationsassociatedwithPLLs,clocks,ARMbootmode,EMIFA,andDSPbootmode.
Note:Defaultconfigurationistheconfigurationbeforethebootprocessbegins.ThebootROM
updatestheconfiguration.SeeChapter11formoreinformationonthebootprocess.
Thedeviceconfigurationpinsarelatchedattheendofpower-onresetorWarmreset.
Thebootconfigurationregister(BOOTCFG)intheSystemModuleisaread-onlyregisterthatindicates
thevalueofthedeviceconfigurationpinslatchedattheendofreset.Duringahardreset(PORorRESET
pinactive[low]),thevaluesofthedeviceconfigurationpins(BTMODE[3:0],CS2BW,PCIEN,and
DSPBOOT)arepropagatedthroughBOOTCFGtotheBootController.WhenRESETorPORis
deasserted(raisingedge),thevalueofthepinsislatched.TheBOOTCFGvaluedoesnotchangeasa
resultofasoftreset,insteadthevaluelatchedattheendofthepreviousglobalresetisretained.
BOOTCFGisshowninFigure10-1anddescribedinTable10-3.Seedevice-specificdatamanualfor
detailsonBOOTCFG.
Thedeviceconfigurationpinsallowyoutoconfigurethefollowingoptionsatreset:
•BootMode(BTMODE[3:0]pins)
•EMIFAEM_CS2defaultbuswidth(CS2BWpin)
•PCIenable(PCIENpin)
•DSPBootMode(DSPBOOTpin)
Note:Thedeviceconfigurationpinsaremultiplexedwithpinsofthevideoportinterface(VPIF).
Afterthedeviceconfigurationpinsarelatchedatreset,theyautomaticallychangetofunction
asVPIFpins.PinmultiplexingisdescribedinChapter9.
Figure10-1.BootConfigurationRegister(BOOTCFG)
31181716
ReservedDSP_BTPCIEN
R-0R-LR-L
15987430
ReservedCS2_BWReservedBOOTMODE
R-0R-LR-0R-L
LEGEND:R=Readonly;L=Latchedpinvalue;-n=valueafterreset
SPRUEP9A–May2008Reset115
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