Texas Instruments TMS320DM646x Computer Hardware User Manual


 
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5.4.3PLLControlRegister(PLLCTL).................................................................................47
5.4.4PLLMultiplierControlRegister(PLLM)........................................................................48
5.4.5PLLControllerDivider1Register(PLLDIV1)..................................................................49
5.4.6PLLControllerDivider2Register(PLLDIV2)..................................................................50
5.4.7PLLControllerDivider3Register(PLLDIV3)..................................................................51
5.4.8BypassDividerRegister(BPDIV)...............................................................................52
5.4.9PLLControllerCommandRegister(PLLCMD)................................................................52
5.4.10PLLControllerStatusRegister(PLLSTAT)...................................................................53
5.4.11PLLControllerClockAlignControlRegister(ALNCTL).....................................................54
5.4.12PLLDIVRatioChangeStatusRegister(DCHANGE)........................................................55
5.4.13ClockEnableControlRegister(CKEN).......................................................................57
5.4.14ClockStatusRegister(CKSTAT)..............................................................................58
5.4.15SYSCLKStatusRegister(SYSTAT)...........................................................................59
5.4.16PLLControllerDividernRegisters(PLLDIV4-PLLDIV6,PLLDIV8,PLLDIV9)...........................60
6PowerandSleepController(PSC)..............................................................................61
6.1Introduction..................................................................................................................62
6.2PowerDomainandModuleTopology...................................................................................63
6.2.1PowerDomainStates.............................................................................................65
6.2.2ModuleStates.....................................................................................................65
6.2.3DSPLocalReset..................................................................................................65
6.3ExecutingModuleStateTransitions.....................................................................................66
6.4IcePickEmulationSupportinthePSC..................................................................................66
6.5PSCInterrupts..............................................................................................................67
6.5.1InterruptEvents....................................................................................................67
6.5.2InterruptRegisterBits.............................................................................................68
6.5.3InterruptHandling.................................................................................................68
6.6PSCRegisters..............................................................................................................69
6.6.1PeripheralRevisionandClassInformationRegister(PID)..................................................70
6.6.2InterruptEvaluationRegister(INTEVAL).......................................................................70
6.6.3ModuleErrorPendingRegister0(MERRPR0)...............................................................71
6.6.4ModuleErrorPendingRegister1(MERRPR1)...............................................................71
6.6.5ModuleErrorClearRegister0(MERRCR0)...................................................................72
6.6.6ModuleErrorClearRegister1(MERRCR1)...................................................................72
6.6.7PowerDomainTransitionCommandRegister(PTCMD)....................................................73
6.6.8PowerDomainTransitionStatusRegister(PTSTAT)........................................................73
6.6.9PowerDomainStatusRegister(PDSTAT0)...................................................................74
6.6.10PowerDomainControlRegister(PDCTL0)...................................................................75
6.6.11ModuleStatusnRegister(MDSTAT0-MDSTAT45).........................................................76
6.6.12ModuleControlnRegister(MDCTL0-MDCTL45)............................................................77
7PowerManagement..................................................................................................79
7.1Overview.....................................................................................................................80
7.2PSCandPLLCOverview.................................................................................................80
7.3ClockManagement........................................................................................................81
7.3.1ModuleClockON/OFF...........................................................................................81
7.3.2ModuleClockFrequencyScaling...............................................................................81
7.3.3PLLBypassandPowerDown...................................................................................81
7.4ARMandDSPSleepModeManagement..............................................................................81
7.4.1ARMWait-For-InterruptSleepMode...........................................................................81
4ContentsSPRUEP9AMay2008
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