Texas Instruments TMS320DM646x Computer Hardware User Manual


 
8.3.2InterruptPrioritization
8.3.3VectorTableEntryAddressGeneration
ReturnfromINTEABASE
InterruptentrytableAddress
BranchtoINTEABASE+(1*SIZE)
BranchtoINT1EABASE+(2*SIZE)
BranchtoINT63EABASE+(64*SIZE)
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AINTCMethodology
Eventpriorityisdeterminedusingbothafixedandaprogrammableprioritizationscheme.TheAINTChas
8differentprogrammableinterruptpriorities.Priority0andpriority1aremappedtotheFIQinterruptwith
priority0beingthehighestpriority.Priorities2-7aremappedtotheIRQinterrupt(priority2isthehighest,
priority7isthelowest).EachinterruptismappedtoaprioritylevelusingtheINTPRInregisters.When
simultaneouseventsoccur(multipleenabledeventscapturedinIRQorFIQregisters),theeventwiththe
highestpriorityistheonewhoseentrytableaddressisgeneratedwhensendingtheinterruptsignaltothe
ARM.Wheneventsofidenticalpriorityoccur,theeventwiththelowesteventnumberistreatedashaving
thehigherpriority.
TohelpspeeduptheISR,theAINTCprovidestwovectorsintotheARM’sinterruptentrytable,which
correspondtothehighestpriorityeffectiveIRQandFIQinterrupts.Thisvectorisgeneratedbymodifyinga
baseaddresswithapriorityindex.Thepriorityindextakesthesizeofeachinterruptentryintoaccount
usingthefollowingformulas:
IRQENTRY=EABASE+((highestpriorityIRQEVT#+1)×SIZE)
FIQENTRY=EABASE+((highestpriorityFIQEVT#+1)×SIZE)
TheEABASEbaseaddressiscontainedinaregister.TheSIZEvalueisaprogrammableregisterfield,
whichselects4,8,16,or32bytesforeachinterrupttableentry.TheIRQENTRYorFIQENTRYregisteris
readbytheARM,dependingonwhichtypeofinterruptitisservicing.TheARMinterruptentrytableformat
isshowninFigure8-2.
Figure8-2.InterruptEntryTable
ThehighestpriorityeffectiveIRQorFIQinterruptincludesonlythoseinterruptsthatareenabledbytheir
correspondingEINTbitbydefault.However,theIERAWandFERAWregisterbits,ifset,allowthehighest
priorityeventofanyofthosecapturedintheIRQorFIQregistertobeusedincalculatingIRQENTRYand
FIQENTRY,respectively(regardlessoftheEINTstate).
TheIRQENTRYandFIQENTRYvaluesaregeneratedinrealtimeastheinterrupteventsoccur.Thus,
theirvaluesmaychangefromthetimethattheIRQorFIQissenttotheARMtothetimetheARMreads
theregister.TheymayalsochangeimmediatelyafterareadbytheARMifahigherpriorityeventoccurs.
IfnoIRQmappedeffectiveinterruptispending,thentheIRQENTRYvaluereflectstheEABASEvalue.
Similarly,ifnoFIQmappedeffectiveinterruptispending,thentheFIQENTRYvaluereflectstheEABASE
value.
1.FortheFIQENTRY:
IfFERAWis0,FIQENTRYreflectsthestateofthehighestprioritypendingenabledFIQinterrupt.If
theactiveFIQinterruptisclearedinFIQn,thenFIQENTRYisimmediatelyupdatedwiththevector
ofthenexthighestprioritypendingenabledFIQinterrupt.
IfFERAWis1,FIQENTRYreflectsthestateofthehighestprioritypendingFIQinterrupt(enabled
ornot).IftheactiveFIQinterruptisclearedinFIQn,thenFIQENTRYisimmediatelyupdatedwith
thevectorofthenexthighestprioritypendinginterrupt(enabledornot).
SPRUEP9AMay2008ARMInterruptController(AINTC)89
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