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F.APPENDIX
117
L
Address Space Identifiers
Every load or store address in a SPARC V9 processor has an 8-bit Address Space
Identifier (ASI) appended to the VA. The VA plus the ASI fully specifies the address.
For instruction loads and for data loads or stores that do not use the load or store
alternate instructions, the ASI is an implicit ASI generated by the hardware. If a load
alternate or store alternate instruction is used, the value of the ASI can be specified
in the %asi register or as an immediate value in the instruction. In practice, ASIs are
not only used to differentiate address spaces but are also used for other functions,
such as referencing registers in the MMU unit.
Please refer to
Commonality
for Sections L.1 and L.2.
L.3 SPARC64 V ASI Assignments
For SPARC64 V, all accesses made with ASI values in the range 00
16
–7F
16
when
PSTATE.PRIV =0 cause a
privileged_action
exception.
Warning – The software should follow the ASI assignments and VA assignments in
TABLE L-1
. Some illegal ASI or VA accesses will cause the machine to enter unknown
states.
TABLE L-1
SPARC64 V ASI Assignments (1 of 3)
Value ASI Name (Suggested Macro Syntax) Type VA Description Page
00
16
–33
16
(JPS1)
34
16
ASI_ATOMIC_QUAD_LDD_PHYS R — 54
35
16
–3B
16
(JPS1)
3C
16
ASI_ATOMIC_QUAD_LDD_PHYS_LITTLE R — 54
3D
16
–44
16
(JPS1)