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Release 1.0, 1 July 2002 F. Chapter P Error Handling
157
P.2.3 Extent of Automatic Source Data Correction for
Correctable Error
Upon detection of the following correctable errors (
CE
), the CPU corrects the input
data and uses the corrected data; however, the source data with the
CE
is not
corrected automatically.
■
CE
in memory (DIMM)
■
CE
in
ASI_INTR_DATA_R
Upon detection of other correctable errors, the CPU automatically corrects the source
data containg the
CE
.
For correctable errors in
ASI_INTR_DATA
, no special action is required by
privileged software because the erroneous data will be overwritten when the next
interrupt is received. For
CE
in memory (DIMM), it is expected that privileged
software will correct the error in memory.
P.2.4 Error Marking for Cacheable Data Error
Error Marking for Cacheable Data
Error marking for cacheable data involves the following action:
Number of
errors
indicated at
trap
All FEs are
detected and
accumulated in
ASI_STCHG_
ERROR_INFO
All EEs are
detected and
accumulated in
ASI_STCHG_
ERROR_INFO
Single-ADE trap
All
I_UGE
s and
A_UGE
s
detected at trap.
Multiple-ADE trap
The multiple-
ADE
indication
+
UGE
s at first
ADE
trap.
IAE
One error
DAE
One error
All restrainable errors
detected and accumulated
in ASI_AFSR.
Error address
indication
register
None None
I_UGE
,
A_UGE
: None
IAE
:
TPC
DAE
:
ASI_DFAR
ASI_AFAR_D1
ASI_AFAR_U2
TABLE P-2
Action Upon Detection of an Error (4 of 4)
Fatal Error (FE)
Error State Transition
Error (EE) Urgent Error (UGE) Restrainable Error (RE)