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118 SPARC JPS1 Implementation Supplement: Fujitsu SPARC64 V • Release 1.0, 1 July 2002
45
16
ASI_DCU_CONTROL_REG (ASI_DCUCR)RW00 22
45
16
ASI_MEMORY_CONTROL_REG RW 08 92
46
16
–49
16
(JPS1)
4A
16
ASI_UPA_CONFIG_REGISTER R — 215
4B
16
(JPS1)
4C
16
ASI_ASYNC_FAULT_STATUS RW 00 174
4C
16
ASI_URGENT_ERROR_STATUS
(ASI_UGESR)
R08 165
4C
16
ASI_ERROR_CONTROL RW 10 161
4C
16
ASI_STCHG_ERROR_INFO RW 18 163
4D
16
ASI_ASYNC_FAULT_ADDR_D1 RW 00 177
4D
16
ASI_ASYNC_FAULT_ADDR_U2 RW 08 178
4E
16
(JPS1)
4F
16
ASI_SCRATCH_REG0 RW 00 120
4F
16
ASI_SCRATCH_REG1 RW 08 120
4F
16
ASI_SCRATCH_REG2 RW 10 120
4F
16
ASI_SCRATCH_REG3 RW 18 120
4F
16
ASI_SCRATCH_REG4 RW 20 120
4F
16
ASI_SCRATCH_REG5 RW 28 120
4F
16
ASI_SCRATCH_REG6 RW 30 120
4F
16
ASI_SCRATCH_REG7 RW 38 120
50
16
–66
16
(JPS1)
67
16
ASI_ALL_FLUSH_L1I W — 129
68
16
–69
16
(JPS1)
6A
16
ASI_L2_CTRL RW — 130
6B
16
ASI_L2_DIAG_TAG_READ R
00
16
-7FFC0
16
130
6C
16
ASI_L2_DIAG_TAG_READ_REG RTBD 130
6D
16
(JPS1)
6E
16
ASI_ERROR_IDENT (ASI_EIDR) RW — 161
6F
16
ASI_C_LBSYR0 RW 00 122
6F
16
ASI_C_LBSYR1 RW 08 122
6F
16
ASI_C_BSTW0 RW 80 123
6F
16
ASI_C_BSTW1 RW 88 123
TABLE L-1
SPARC64 V ASI Assignments (2 of 3)
Value ASI Name (Suggested Macro Syntax) Type VA Description Page