vi SPARC JPS1 Implementation Supplement: Fujitsu SPARC64 V • Release 1.0, 1 July 2002
error_state Transition Error 150
Urgent Error 150
Restrainable Error 152
Action and Error Control 153
Registers Related to Error Handling 153
Summary of Actions Upon Error Detection 154
Extent of Automatic Source Data Correction for Correctable Error 157
Error Marking for Cacheable Data Error 157
ASI_EIDR 161
Control of Error Action (ASI_ERROR_CONTROL) 161
Fatal Error and error_state Transition Error 163
ASI_STCHG_ERROR_INFO 163
Fatal Error Types 164
Types of error_state Transition Errors 164
Urgent Error 165
URGENT ERROR STATUS (ASI_UGESR) 165
Action of
async_data_error
(ADE) Trap 168
Instruction End-Method at ADE Trap 170
Expected Software Handling of ADE Trap 171
Instruction Access Errors 173
Data Access Errors 173
Restrainable Errors 174
ASI_ASYNC_FAULT_STATUS (ASI_AFSR) 174
ASI_ASYNC_FAULT_ADDR_D1 177
ASI_ASYNC_FAULT_ADDR_U2 178
Expected Software Handling of Restrainable Errors 179
Handling of Internal Register Errors 181
Register Error Handling (Excluding ASRs and ASI Registers) 181
ASR Error Handling 182
ASI Register Error Handling 183
Cache Error Handling 188
Handling of a Cache Tag Error 188
Handling of an I1 Cache Data Error 190
Handling of a D1 Cache Data Error 190
Handling of a U2 Cache Data Error 192
Automatic Way Reduction of I1 Cache, D1 Cache, and U2 Cache 193