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(e) The following shows an example of the 32-bit indexing with "ZZ"
specification and the actual processing device.
(When Z0 (32-bit) is 100000 and Z2 (16-bit) is -20)
Ladder example Actual process device
X0
DMOV K100000 Z0
MOV ZR1000Z0 D30Z2
MOV K-20 Z2
X1
MOV
Description
ZR101000 D10
X1
ZR1000Z0 ZR(1000+100000)=ZR101000
D30Z2
D(30-20)=D10
(f) Available functions for "ZZ" specification
The 32-bit indexing specification with "ZZ" specification applies to the
following functions of GX Works2.
No. Function name and description
1 Specifying devices in program instruction
2 Entry device monitor
3 Device test
4 Device test with conditions
5 Monitor condition setting
6
Sampling trace
(Trace point (specifying devices), trace target device)
POINT
ZZn cannot be used alone as a device like "DMOV K100000 ZZ0".
When setting values of index registers to specify 32-bit indexing with "ZZ"
specification, set the value of Zn (Z0 to Z19).
ZZn alone cannot be input to each function of GX Works2.
For details, refer to the QnUCPU User's Manual Function Explanation, Program
Fundamentals and MELSEC-Q/L Programming Manual (Common Instruction).