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ARM DDI 0363E Copyright © 2009 ARM Limited. All rights reserved. 11-62
ID013010 Non-Confidential, Unrestricted Access
dscr := ReadDebugRegister(34);
}
until (dscr & (1<<19));
}
// Step 4. Read the entire processor state. The function ReadAllRegisters
// reads all general-purpose registers for all processor mode, and saves
// the data in “state”.
ReadAllRegisters(state);
// Step 5. Based on the CPSR (processor state), determine the actual restart
// address
if (state->cpsr & (1<<5);
{
// set the T bit to Thumb state
state->pc := state->pc - 4;
}
elseif (state->cpsr & (1<<24))
{
// Set the J bit to Jazelle state. Note: ARM Cortex-R4 does not support
// Jazelle state but ARMv7 debug does.
state->pc := state->pc - IMPLEMENTATION DEFINED
value;
}
else
{
// ARM state
state->pc := state->pc - 8;
}
// Step 6. If the method of entry was Watchpoint Occurred, read the WFAR
// register
method_of_debug_entry := ((state->dscr >> 2) & 0xF;
if (method_of_debug_entry == 2 || method_of_debug_entry == 10)
{
state->wfar := ReadDebugRegister(6);
}
}
11.11.5 Debug state exit
When exiting debug state, the program counter must always be written. If the execution state or
CPSR must be changed, this must be done before writing to the PC because writing to the CPSR
can affect the PC.
Having restored the program state, the debugger can restart by writing to bit [1] of the Debug
Run Control Register. It must then poll bit [1] of the Debug Status and Control Register to
determine if the core has restarted.
Example 11-12 shows the code for exit from debug state.
Example 11-12 Leaving debug state
ExitDebugState(PROCESSOR_STATE *state)
{
// Step 1. Update the CPSR value
WriteCPSR(state->cpsr);
// Step 2. Restore any registers corrupted by debug state. The function
// WriteAllRegisters restores all general-purpose registers for all
// processor modes apart from R0.
WriteAllRegisters(state);
// Step 3. Write the return address.