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Theory of Operation (2635A)
Functional Block Description
2A
2A-5
–5.4 Vdc (V
SS
)
+5.3Vdc (V
DD
)
+5.1 Vdc (V
CC
)
–5 Vdc (V
EE
)
POWER
SUPPLY
FPGA
ADDRESS
DECODING
RESET
CIRCUITS
µ
P
FRONT PANEL SWITCHES
DISPLAY CONTROLLER
VACUUM FLUORESCENT
DISPLAY
DISPLAY ASSEMBLY
ANALOG
MEASUREMENT
PROCESSOR
(A/D CONVERTER)
INPUT SIGNAL
CONDITIONING
INPUT PROTECTION
INPUT MULTIPLEXING
GUARD
CROSSING
ANALOG INPUT CONNECTOR
A/D CONVERTER
PCA
DIGITAL I/O
+5.6 Vdc (V
DDR
)
RS-232
5.4 Vac
–30 Vdc (V
LOAD
)
INGUARD
OUTGUARD
MAIN PCA
MICRO CONTROLLER
INGUARD
OUTGUARD
MEMORY
CARD
INTERFACE
OPTION
INTERFACE
FLASH
MEMORY
NVRAM &
REAL-TIME
CLOCK
SERIAL
COMMUNICATION
s12f.eps
Figure 2A-2. Overall Functional Block Diagram (2635A)