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SRIORegisters
Table40.SerialRapidIO(SRIO)Registers(continued)
OffsetAcronymRegisterDescriptionSection
030ChINTDST3_DECODEINTDSTInterruptStatusDecodeRegister3Section5.31
0310hINTDST4_DECODEINTDSTInterruptStatusDecodeRegister4Section5.31
0314hINTDST5_DECODEINTDSTInterruptStatusDecodeRegister5Section5.31
0318hINTDST6_DECODEINTDSTInterruptStatusDecodeRegister6Section5.31
031ChINTDST7_DECODEINTDSTInterruptStatusDecodeRegister7Section5.31
0320hINTDST0_RATE_CNTLINTDSTInterruptRateControlRegister0Section5.32
0324hINTDST1_RATE_CNTLINTDSTInterruptRateControlRegister1Section5.32
0328hINTDST2_RATE_CNTLINTDSTInterruptRateControlRegister2Section5.32
032ChINTDST3_RATE_CNTLINTDSTInterruptRateControlRegister3Section5.32
0330hINTDST4_RATE_CNTLINTDSTInterruptRateControlRegister4Section5.32
0334hINTDST5_RATE_CNTLINTDSTInterruptRateControlRegister5Section5.32
0338hINTDST6_RATE_CNTLINTDSTInterruptRateControlRegister6Section5.32
033ChINTDST7_RATE_CNTLINTDSTInterruptRateControlRegister7Section5.32
0400hLSU1_REG0LSU1ControlRegister0Section5.33
0404hLSU1_REG1LSU1ControlRegister1Section5.34
0408hLSU1_REG2LSU1ControlRegister2Section5.35
040ChLSU1_REG3LSU1ControlRegister3Section5.36
0410hLSU1_REG4LSU1ControlRegister4Section5.37
0414hLSU1_REG5LSU1ControlRegister5Section5.38
0418hLSU1_REG6LSU1ControlRegister6Section5.39
041ChLSU1_FLOW_MASKSLSU1CongestionControlFlowMaskRegisterSection5.40
0420hLSU2_REG0LSU2ControlRegister0Section5.33
0424hLSU2_REG1LSU2ControlRegister1Section5.34
0428hLSU2_REG2LSU2ControlRegister2Section5.35
042ChLSU2_REG3LSU2ControlRegister3Section5.36
0430hLSU2_REG4LSU2ControlRegister4Section5.37
0434hLSU2_REG5LSU2ControlRegister5Section5.38
0438hLSU2_REG6LSU2ControlRegister6Section5.39
043ChLSU2_FLOW_MASKS1LSU2CongestionControlFlowMaskRegisterSection5.40
0440hLSU3_REG0LSU3ControlRegister0Section5.33
0444hLSU3_REG1LSU3ControlRegister1Section5.34
0448hLSU3_REG2LSU3ControlRegister2Section5.35
044ChLSU3_REG3LSU3ControlRegister3Section5.36
0450hLSU3_REG4LSU3ControlRegister4Section5.37
0454hLSU3_REG5LSU3ControlRegister5Section5.38
0458hLSU3_REG6LSU3ControlRegister6Section5.39
045ChLSU3_FLOW_MASKS2LSU3CongestionControlFlowMaskRegisterSection5.40
0460hLSU4_REG0LSU4ControlRegister0Section5.33
0464hLSU4_REG1LSU4ControlRegister1Section5.34
0468hLSU4_REG2LSU4ControlRegister2Section5.35
046ChLSU4_REG3LSU4ControlRegister3Section5.36
0470hLSU4_REG4LSU4ControlRegister4Section5.37
0474hLSU4_REG5LSU4ControlRegister5Section5.38≈
0478hLSU4_REG6LSU4ControlRegister6Section5.39
047ChLSU4_FLOW_MASKS3LSU4CongestionControlFlowMaskRegisterSection5.40
0500hQUEUE0_TXDMA_HDPQueueTransmitDMAHeadDescriptorPointerRegister0Section5.41
104SerialRapidIO(SRIO)SPRUE13A–September2006
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