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2.3.2.4SERDESConfigurationExample
2.3.3DirectI/OOperation
SRIOFunctionalDescription
Table13.SWINGBitsofSERDES_CFGTXn_CNTL
SWINGBitsAmplitude(mV
dfpp
)
000b125
001b250
010b500
011b625
100b750
101b1000
110b1125
111b1250
//fullsamplerateat3.125Gbps
//SERDESreferenceclock(RIOCLK)125MHz
//MPY=12.5125MHz=((3.125Gbps)(.5))/MPY
SRIO_REGS->SERDES_CFG0_CNTL=0x0000000F;
SRIO_REGS->SERDES_CFG1_CNTL=0x00000000;
SRIO_REGS->SERDES_CFG2_CNTL=0x00000000;
SRIO_REGS->SERDES_CFG3_CNTL=0x00000000;
//SRIO_REGS->SERDES_CFG1_CNTLnotused
//SRIO_REGS->SERDES_CFG2_CNTLnotused
//SRIO_REGS->SERDES_CFG3_CNTLnotused
//fourportsenabled
SRIO_REGS->SERDES_CFGRX0_CNTL=0x00081101;
SRIO_REGS->SERDES_CFGRX1_CNTL=0x00081101;
SRIO_REGS->SERDES_CFGRX2_CNTL=0x00081101;
SRIO_REGS->SERDES_CFGRX3_CNTL=0x00081101;
SRIO_REGS->SERDES_CFGTX0_CNTL=0x00010801;
SRIO_REGS->SERDES_CFGTX1_CNTL=0x00010801;
SRIO_REGS->SERDES_CFGTX2_CNTL=0x00010801;
SRIO_REGS->SERDES_CFGTX3_CNTL=0x00010801;
ThedirectI/O(Load/Store)moduleservesasthesourceofalloutgoingdirectI/Opackets.WithdirectI/O,
theRapidIOpacketcontainsthespecificaddresswherethedatashouldbestoredorreadinthe
destinationdevice.DirectI/OrequiresthataRapidIOsourcedevicekeepalocaltableofaddressesfor
memorywithinthedestinationdevice.Oncethesetablesareestablished,theRapidIOsourcecontroller
usesthisdatatocomputethedestinationaddressandinsertitintothepacketheader.TheRapidIO
destinationperipheralextractsthedestinationaddressfromthereceivedpacketheaderandtransfersthe
payloadtomemoryviatheDMA.
WhenaCPUwantstosenddatafrommemorytoanexternalprocessingelement(PE)orreaddatafrom
anexternalPE,itprovidestheRIOperipheralvitalinformationaboutthetransfersuchasDSPmemory
address,targetdeviceID,targetdestinationaddress,packetpriority,etc.Essentially,ameansmustexist
tofillalltheheaderfieldsoftheRapidIOpacket.TheLoad/Storemoduleprovidesamechanismtohandle
thisinformationexchangeviaasetofMMRsactingastransferdescriptors.Theseregisters,shownin
Figure12,areaddressablebytheCPUthroughtheconfigurationbus.Uponcompletionofawriteto
LSUn_REG5,adatatransferisinitiatedforeitheranNREAD,NWRITE,NWRITE_R,SWRITE,ATOMIC,
orMAINTENANCERapidIOtransaction.Somefields,suchastheRapidIOsrcTID/targetTIDfield,are
assignedbyhardwareanddonothaveacorrespondingcommandregisterfield.
SPRUE13A–September2006SerialRapidIO(SRIO)35
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