Filter
Top Products
www.ti.com
5.7BlocknEnableRegister(BLKn_EN)
SRIORegisters
Therearenineoftheseregisters,oneforeachofninelogicalblocksintheperipheral.Theregistersand
theblockstheysupportarelistedinTable46.Thegeneralformforablocknenableregister(BLKn_EN)is
showninFigure68anddescribedinTable47.Foradditionalprogramminginformation,see
Section2.3.10.
Table46.BlocknEnableRegistersandtheAssociatedBlocks
RegisterAddressOffsetAssociatedBlock
BLK0_EN0038hLogicalblock0:thesetofmemory-mappedcontrolregistersfortheSRIO
peripheral
BLK1_EN0040hLogicalblock1:theLoad/Storemodule(thefourLSUsandsupportinglogic)
BLK2_EN0048hLogicalblock2:thememoryaccessunit(MAU)
BLK3_EN0050hLogicalblock3:themessagetransmitunit(TXU)
BLK4_EN0058hLogicalblock4:themessagereceiveunit(RXU).
BLK5_EN0060hLogicalblock5:SRIOport0
BLK6_EN0068hLogicalblock6:SRIOport1.
BLK7_EN0070hLogicalblock7:SRIOport2.
BLK8_EN0078hLogicalblock8:SRIOport3.
Figure68.BlocknEnableRegister(BLKn_EN)
3110
ReservedEN
R-0R/W-1
LEGEND:R/W=Read/Write;R=Readonly;-n=Valueafterreset
Table47.BlocknEnableRegister(BLKn_EN)FieldDescriptions
BitFieldValueDescription
31-1Reserved0Reserved
0ENBlocknenable
0Logicalblocknistoberesetwithitsclockoff.
1Logicalblocknistobeenabledwithitsclockrunning.
SPRUE13A–September2006SerialRapidIO(SRIO)119
SubmitDocumentationFeedback