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5.20TXCPPIInterruptStatusRegister(TX_CPPI_ICSR)
SRIORegisters
ThebitsinthisregisterindicateanyactiveinterruptrequestsfromTXbufferdescriptorqueues.
TX_CPPI_ICSRisshowninFigure81anddescribedinTable71.
Figure81.TXCPPIInterruptConditionStatusRegister(TX_CPPI_ICSR)-AddressOffset0250h
3116
Reserved
R-0
1514131211109876543210
ICS15ICS14ICS13ICS12ICS11ICS10ICS9ICS8ICS7ICS6ICS5ICS4ICS3ICS2ICS1ICS0
R/W-0R/W-0R/W-0R/W-0R/W-0R/W-0R/W-0R/W-0R/W-0R/W-0R/W-0R/W-0R/W-0R/W-0R/W-0R/W-0
LEGEND:R/W=Read/Write;R=Readonly;-n=Valueafterreset
Table71.TXCPPIInterruptConditionStatusRegister(TX_CPPI_ICSR)FieldDescriptions
BitFieldValueDescription
31–16Reserved0Theseread-onlybitsreturn0whenread.
15–0ICSxTXCPPIinterruptstatus
(x=15to0)
0TXbufferdescriptorqueuexhasnotgeneratedaninterruptrequest.
1TXbufferdescriptorqueuexhasgeneratedaninterruptrequest.
SerialRapidIO(SRIO) 136SPRUE13A–September2006
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