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5.28TXCPPIInterruptConditionRoutingRegisters(TX_CPPI_ICRRandTX_CPPI_ICRR2)
SRIORegisters
Figure89andTable80summarizetheICRRsfortheTXU.Theseregistersroutequeueinterruptsto
interruptdestinations.Forexample,ifICS6=1inTX_CPPI_ICSRandICR6=0011binTX_CPPI_ICRR,
theinterruptrequestfromTXbufferdescriptorqueue6issenttointerruptdestination3.Foradditional
programmingseeSection4.4.1.1.
Figure89.TXCPPIInterruptConditionRoutingRegisters
TXCPPIInterruptConditionRoutingRegister(TX_CPPI_ICRR)(AddressOffset02D0h)
3128272423201916
ICR7ICR6ICR5ICR4
R/W-0000R/W-0000R/W-0000R/W-0000
15121187430
ICR3ICR2ICR1ICR0
R/W-0000R/W-0000R/W-0000R/W-0000
TXCPPIInterruptConditionRoutingRegister2(TX_CPPI_ICRR2)(AddressOffset02D4h)
3128272423201916
ICR15ICR14ICR13ICR12
R/W-0000R/W-0000R/W-0000R/W-0000
15121187430
ICR11ICR10ICR9ICR8
R/W-0000R/W-0000R/W-0000R/W-0000
LEGEND:R/W=Read/Write;-n=Valueafterreset
Table80.TXCPPIInterruptConditionRoutingRegisterFieldDescriptions
FieldValueDescription
ICRxInterruptconditionrouting.RoutestheinterruptrequestfromTXbufferdescriptorqueuextooneof
(x=0to15)eightinterruptdestinations(INTDST0–INTDST7).
0000bINTDST0
0001bINTDST1
0010bINTDST2
0011bINTDST3
0100bINTDST4
0101bINTDST5
0110bINTDST6
0111bINTDST7
1xxxbReserved
SerialRapidIO(SRIO) 146SPRUE13A–September2006
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