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5.37LSUnControlRegister4(LSUn_REG4)
SRIORegisters
Therearefouroftheseregisters,oneforeachLSU(seeTable95).LSUn_REG4isshowninFigure98
anddescribedinTable96.ForadditionalprogrammingseeSection2.3.3.
Table95.LSUn_REG4RegistersandtheAssociatedLSUs
RegisterAddressOffsetAssociatedLSU
LSU1_REG40410hLSU1
LSU2_REG40430hLSU2
LSU3_REG40450hLSU3
LSU4_REG40470hLSU4
Figure98.LSUnControlRegister4(LSUn_REG4)
313029282726252423
OUTPORTIDPRIORITYXAMSBID_SIZEDESTID
R/W-00R/W-00R/W-00R/W-00R/W-0000h
8710
INTERRUPT_
DESTIDReserved
REQ
R/W-0000hR-00hR/W-0
LEGEND:R/W=Read/Write;R=Readonly;-n=Valueafterreset
Table96.LSUnControlRegister4(LSUn_REG4)FieldDescriptions
BitFieldValueDescription
31–30OUTPORTID00b–11bIndicatesthenumberoftheoutputport(0,1,2,or3)fromwhichthepacketisto
betransmitted.SpecifiedbytheCPUalongwiththenodeID.Theoutputport
valueisnotincludedintheRapidIOheader.
29–28PRIORITY00b–11bSuppliesthepriofieldoftheRapidIOpacketheadertoindicatepacketpriority.
Toavoidsystemdeadlock,itisrecommendedthatrequestpacketsnotbesent
withprioritylevel3.Itistheresponsibilityofthesoftwaretoassignthe
appropriateoutgoingpriority.
27–26XAMSB00b–11bSuppliesthexamsbfieldoftheRapidIOpacketheadertospecifythe2MSBsof
theextendedRapidIOaddress.
25–24ID_SIZESuppliesthettfieldoftheRapidIOpacketheadertospecifywhether8-bitor
16-bitDeviceIDsareused.
00b8bitdeviceIDs
01b16bitdeviceIDs
1xbReserved
23–8DESTID0000hSuppliesthedestinationIDfieldoftheRapidIOpacketheadertospecifying
targetdevice.
7–1Reserved00hTheseread-onlybitsreturn0swhenread.
0INTERRUPT_REQIndicateswhethertheCPUrequestsaninterruptuponcompletionoftheLSU
command.ThisisaCPU-controlledrequestbitandistypicallyusedin
conjunctionwithnon-postedcommandstoalerttheCPUwhentherequested
data/statusispresent.
0Interruptnotrequesteduponcompletionofcommand
1Interruptrequesteduponcompletionofcommand
SPRUE13A–September2006SerialRapidIO(SRIO)159
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