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5.6PeripheralGlobalEnableStatusRegister(GBL_EN_STAT)
SRIORegisters
Theperipheralglobalenablestatusregister(GBL_EN_STAT)isshowninFigure67anddescribedin
Table45.Foradditionalprogramminginformation,seeSection2.3.10.
Figure67.PeripheralGlobalEnableStatusRegister(GBL_EN_STAT)-Address0034h
3124
Reserved
R-0
2316
Reserved
R-0
151098
BLK8_EN_BLK7_EN_
Reserved
STATSTAT
R-0R-1R-1
76543210
BLK6_EN_BLK5_EN_BLK4_EN_BLK3_EN_BLK2_EN_BLK1_EN_BLK0_EN_GBL_EN_
STATSTATSTATSTATSTATSTATSTATSTAT
R-1R-1R-1R-1R-1R-1R-1R-1
LEGEND:R=Readonly;-n=Valueafterreset
Table45.PeripheralGlobalEnableStatusRegister(GBL_EN_STAT)FieldDescriptions
BitFieldValueDescription
31–10Reserved0Theseread-onlybitsreturn0swhenread.
9BLK8_EN_STATBlock8enablestatus.Logicalblock8isSRIOport3.
0Logicalblock8isinresetwithitsclockoff.
1Logicalblock8isenabledwithitsclockrunning.
8BLK7_EN_STATBlock7enablestatus.Logicalblock7isSRIOport2.
0Logicalblock7isinresetwithitsclockoff.
1Logicalblock7isenabledwithitsclockrunning.
7BLK6_EN_STATBlock6enablestatus.Logicalblock6isSRIOport1.
0Logicalblock6isinresetwithitsclockoff.
1Logicalblock6isenabledwithitsclockrunning.
6BLK5_EN_STATBlock5enablestatus.Logicalblock5isSRIOport0.
0Logicalblock5isinresetwithitsclockoff.
1Logicalblock5isenabledwithitsclockrunning.
5BLK4_EN_STATBlock4enablestatus.Logicalblock4isthemessagereceiveunit(RXU).
0Logicalblock4isinresetwithitsclockoff.
1Logicalblock4isenabledwithitsclockrunning.
4BLK3_EN_STATBlock3enablestatus.Logicalblock3isthemessagetransmitunit(TXU).
0Logicalblock3isinresetwithitsclockoff.
1Logicalblock3isenabledwithclockrunning.
3BLK2_EN_STATBlock2enablestatus.Logicalblock2isthememoryaccessunit(MAU).
0Logicalblock2isinresetwithitsclockoff.
1Logicalblock2isenabledwithitsclockrunning.
2BLK1_EN_STATBlock1enablestatus.Logicalblock1istheLoad/Storemodule,whichis
comprisedofthefourLoad/Storeunits(LSU1,LSU2,LSU3,andLSU4).
0Logicalblock1isinresetwithitsclockoff.
1Logicalblock1isenabledwithitsclockrunning.
SPRUE13A–September2006SerialRapidIO(SRIO)117
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