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2.3.13.3PeripheralInitializations
SRIOFunctionalDescription
SRIO_REGS->SERDES_CFG0_CNTL=0x00000013;
SRIO_REGS->SERDES_CFG1_CNTL=0x00000000;
SRIO_REGS->SERDES_CFG2_CNTL=0x00000000;
SRIO_REGS->SERDES_CFG3_CNTL=0x00000000;
SRIO_REGS->SERDES_CFGRX0_CNTL=0x00081121;//enablerx,halfrate
SRIO_REGS->SERDES_CFGRX1_CNTL=0x00081121;//enablerx,halfrate
SRIO_REGS->SERDES_CFGRX2_CNTL=0x00081121;//enablerx,halfrate
SRIO_REGS->SERDES_CFGRX3_CNTL=0x00081121;//enablerx,halfrate
SRIO_REGS->SERDES_CFGTX0_CNTL=0x00010821;//enabletx,halfrate
SRIO_REGS->SERDES_CFGTX1_CNTL=0x00010821;//enabletx,halfrate
SRIO_REGS->SERDES_CFGTX2_CNTL=0x00010821;//enabletx,halfrate
SRIO_REGS->SERDES_CFGTX3_CNTL=0x00010821;//enabletx,halfrate
SetDeviceIDRegisters
rdata=SRIO_REGS->DEVICEID_REG1;
wdata=0x00ABBEEF;
mask=0x00FFFFFF;
mdata=(wdata&mask)|(rdata&~mask);
SRIO_REGS->DEVICEID_REG1=mdata;//id-16b=BEEF,id-08b=AB
rdata=SRIO_REGS->DEVICEID_REG2;
wdata=0x00ABBEEF;
mask=0x00FFFFFF;
mdata=(wdata&mask)|(rdata&~mask);
SRIO_REGS->DEVICEID_REG2=mdata;//id-16b=BEEF,id-08b=AB
rdata=SRIO_REGS->PER_SET_CNTL;
data=0x00000000;
mask=0x01000000;
mdata=(wdata&mask)|(rdata&~mask);
SRIO_REGS->PER_SET_CNTL=mdata;//bootcmpl=0
SRIO_REGS->DEV_ID=0xBEEF0030;//id=BEEF,ti=0x0030
SRIO_REGS->DEV_INFO=0x00000000;//0
SRIO_REGS->ASBLY_ID=0x00000030;//ti=0x0030
SRIO_REGS->ASBLY_INFO=0x00000000;//0x0000,nextext=0x0100
SRIO_REGS->PE_FEAT=0x20000019;//proc,buext,16-bitID,34-bitaddr
SRIO_REGS->SRC_OP=0x0000FDF4;//all
SRIO_REGS->DEST_OP=0x0000FC04;//allexceptatomic
SRIO_REGS->PE_LL_CTL=0x00000001;//34-bitaddr
SRIO_REGS->LCL_CFG_HBAR=0x00000000;//0
SRIO_REGS->LCL_CFG_BAR=0x00000000;//0
SRIO_REGS->BASE_ID=0x00ABBEEF;//16b-id=BEEF,08b-id=AB
SRIO_REGS->HOST_BASE_ID_LOCK=0x0000BEEF;//id=BEEF,lock
SRIO_REGS->COMP_TAG=0x00000000;//nottouched
SRIO_REGS->SP_IP_DISCOVERY_TIMER=0x90000000;//0,shortcyclesforsim
SRIO_REGS->IP_PRESCAL=0x00000021;//srv_clkprescalar=0x21(333MHz)
SRIO_REGS->SP0_SILENCE_TIMER=0x20000000;
SRIO_REGS->SP1_SILENCE_TIMER=0x20000000;
SRIO_REGS->SP2_SILENCE_TIMER=0x20000000;
SRIO_REGS->SP3_SILENCE_TIMER=0x20000000;
rdata=SRIO_REGS->PER_SET_CNTL;
wdata=0x01000000;
mask=0x01000000;
mdata=(wdata&mask)|(rdata&~mask);
SRIO_REGS->PER_SET_CNTL=mdata;//bootcmpl=1
RIO_REGS->SP_LT_CTL=0xFFFFFF00;//long
78SerialRapidIO(SRIO)SPRUE13A–September2006
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