Filter
Top Products
Events and Performance Monitor
ARM DDI 0363E Copyright © 2009 ARM Limited. All rights reserved. 6-19
ID013010 Non-Confidential, Unrestricted Access
6.4 Event bus interface
The event bus, EVNTBUS, is used to signal when an event has occurred. The event bus includes
most, but not all, of the events that can be counted by the performance monitoring unit. Each
individual event is assigned to an individual bit of this bus, and this bit is asserted for one cycle
each time the event occurs.
The event bus only signals events when it is enabled. Set the X bit in the Performance Monitor
Control Register to enable the event bus. See c9, Performance Monitor Control Register on
page 6-7.
See Table 6-1 on page 6-2 to see which bit of the event bus each event is signaled on.
Note
If an event is being counted in the PMU, the count might not be incremented in exactly the same
cycle that the event is signaled on the event bus.
6.4.1 Use of the event bus and counters
The event bus is designed to be connected to the ETM-R4, which enables processor events to
trigger tracing for debug purposes. You can also connect it to event counting registers external
to the processor, or to an interrupt generator.
Because each EVNTBUS pin is only asserted for one cycle for each occurrence of the event, it
is possible to create composite events by ORing various EVNTBUS pins together. A composite
event signal like this is asserted when any of the included events occur although, if multiple
events occur in the same cycle, the composite event only occurs once.
The processor also has two event input pins, ETMEXTOUT[1:0]. This bus is normally
intended for connection to the ETM, and enables the Cortex-R4 performance monitor to count
events generated by the ETM. These inputs can alternatively be used for composite events
generated external to the processor.