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ARM DDI 0363E Copyright © 2009 ARM Limited. All rights reserved. 11-31
ID013010 Non-Confidential, Unrestricted Access
Figure 11-15 PRSR format
Table 11-24 shows how the bit values correspond with the PRSR functions.
31
0
3
Reserved
214
Sticky reset status
Reset status
Sticky power-down status
Power-down status
Table 11-24 PRSR functions
Bits Field Function
[31:4] Reserved Do not modify on writes. On reads, the value returns zero.
[3] Sticky reset status Sticky reset status bit. This bit is cleared on read.
0 = the processor has not been reset since the last time this register was read. This
is the reset value.
1 = the processor has been reset since the last time this register was read.
This sticky bit is set to 1 when nSYSPORESET is asserted.
[2] Reset status Reset status bit:
0 = the processor is not currently held in reset
1 = the processor is currently held in reset.
This bit reads 1 when nSYSPORESET is asserted.
[1] Sticky power-down status Reserved. Always zero.
[0] Power-down status Reserved. Always one.