ARM R4 Computer Hardware User Manual


 
Debug
ARM DDI 0363E Copyright © 2009 ARM Limited. All rights reserved. 11-68
ID013010 Non-Confidential, Unrestricted Access
WriteDebugRegister(32, value);
// Step 2. Write the opcode for MRC p14, 0, Rd, c5, c0 to the ITR.
// Write stalls until the ITR is ready.
WriteDebugRegister(33, 0xEE100E15 + (Rd<<12));
}
Note
To transfer a register to the processor when in stall mode, you are not required to poll the DSCR
each time an instruction is written to the ITR and a value read from or written to the DTR. The
processor stalls using the signal PREADYDBG until the previous instruction has completed or
the DTR register is ready for the operation.
Fast memory read/write
This section provides example code to enable faster reads from memory by making use of the
DTR access mode.
Example 11-25 shows the sequence for reading a block of words of memory.
Example 11-25 Reading a block of words of memory
ReadWords(uint32 address, bool &aborted, uint32 *data, int nwords)
{
// Step 1. Write the value 0b01 to DSCR[21:20] for stall mode.
SetDTRAccessMode(1);
// Step 2. Save the value of R0.
saved_r0 := ReadRegisterInStallMode(0);
// Step 3. Write the address to read from to the DTRRX.
// Write stalls until the DTRRX is ready.
WriteRegisterInStallMode(0, address);
// Step 4. Write the opcode for LDC p14, c5, [R0], 4 to the ITR.
// Write stalls until the ITR is ready.
WriteDebugRegister(33, 0xECB05E01);
// Step 5. Write the value 0b10 to DSCR[21:20] for fast mode.
SetDCCAccessMode(2);
// Step 6. Loop reading out the data.
// Each time a word is read from the DTRTX, the instruction is reissued.
while (nwords > 1)
{
*data++ = ReadDebugRegister(35);
--nwords;
}
// Step 7. Write the value 0b00 to DSCR[21:20] for non-blocking mode.
SetDTRAccessMode(0);
// Step 8. Need to wait for the final instruction to complete. If there
// was an abort, this will complete immediately.
do
{
dscr := ReadDebugRegister(34);
}
until (dscr & (1<<24));
// Step 9: Check for aborts.
aborted := CheckForAborts();
// Step 10: Read the final word from the DCC.
if (!aborted) *data := ReadDCC();
// Step 11. Restore the corrupted register r0.
WriteRegister(0, saved_r0);