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ARM DDI 0363E Copyright © 2009 ARM Limited. All rights reserved. 15-7
ID013010 Non-Confidential, Unrestricted Access
Table 15-8 shows the timing parameters for the test input ports.
Table 15-9 shows the timing parameters for the TCM interface input ports.
Table 15-8 Test input ports timing parameters
Input delay
minimum
Input
delay
maximum
Signal name
Clock uncertainty 10% SE
Clock uncertainty 10% RSTBYPASS
Clock uncertainty 50% MBTESTON
Clock uncertainty 50% MBISTDIN[71:0]
Clock uncertainty 50% MBISTADDR[19:0]
Clock uncertainty 50% MBISTCE
Clock uncertainty 50% MBISTSEL[4:0]
Clock uncertainty 50% MBISTWE[7:0]
Table 15-9 TCM interface input ports timing parameters
Input delay
minimum
Input
delay
maximum
Signal name
Clock uncertainty 65% ATCDATAIN[63:0]
Clock uncertainty 65% ATCPARITYIN[13:0]
Clock uncertainty 65% ATCERROR
Clock uncertainty 50% ATCWAIT
Clock uncertainty 40% ATCLATEERROR
Clock uncertainty 50% ATCRETRY
Clock uncertainty 65% B0TCDATAIN[63:0]
Clock uncertainty 65% B0TCPARITYIN[13:0]
Clock uncertainty 65% B0TCERROR
Clock uncertainty 50% B0TCWAIT
Clock uncertainty 40% B0TCLATEERROR
Clock uncertainty 50% B0TCRETRY
Clock uncertainty 65% B1TCDATAIN[63:0]
Clock uncertainty 65% B1TCPARITYIN[13:0]
Clock uncertainty 65% B1TCERROR