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Processor Signal Descriptions
ARM DDI 0363E Copyright © 2009 ARM Limited. All rights reserved. A-20
ID013010 Non-Confidential, Unrestricted Access
A.10 Test signals
Table A-15 shows the test signals.
Table A-15 Test signals
Signal Direction Clocking Description
SE Input
-
a
a. Design for test only.
Scan Enable
RSTBYPASS Input
-
a
Bypass pipelined reset