ARM R4 Computer Hardware User Manual


 
Introduction
ARM DDI 0363E Copyright © 2009 ARM Limited. All rights reserved. 1-2
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1.1 About the processor
The processor is a mid-range CPU for use in deeply-embedded systems.
The features of the processor include:
An integer unit with integral EmbeddedICE-RT logic.
High-speed Advanced Microprocessor Bus Architecture (AMBA) Advanced eXtensible
Interfaces (AXI) for Level two (L2) master and slave interfaces.
Dynamic branch prediction with a global history buffer, and a 4-entry return stack.
Low interrupt latency.
Non-maskable interrupt.
Optional Floating Point Unit (FPU). The Cortex-R4F processor is a Cortex-R4 processor
that includes the FPU.
A Harvard Level one (L1) memory system with:
optional Tightly-Coupled Memory (TCM) interfaces with support for error
correction or parity checking memories
optional caches with support for optional error correction schemes
optional ARMv7-R architecture Memory Protection Unit (MPU)
optional parity and Error Checking and Correction (ECC) on all RAM blocks.
The ability to implement and use redundant core logic, for example, in fault detection.
An L2 memory interface:
single 64-bit master AXI interface
64-bit slave AXI interface to TCM RAM blocks and cache RAM blocks.
A debug interface to a CoreSight Debug Access Port (DAP).
A trace interface to a CoreSight ETM-R4.
•A Performance Monitoring Unit (PMU).
•A Vectored Interrupt Controller (VIC) port.