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CHAPTER 6 PERIPHERAL HARDWARE FUNCTION
111
User’s Manual U10676EJ3V0UM
Figure 6-18. Example of Incorrect Resonator Connection (3/3)
(d) Current flowing through power line of oscillator
(potential at points A, B, and C changes)
µ
PD754144
CL1 CL2 VSS
PORTn
(n = 3, 6-8)
VDD
AB
High current
µ
• PD754144
µ
• PD754244
µ
PD754244
X1 X2 VSS
PORTn
(n = 3, 6-8)
VDD
AC
High current
B
(e) Signal fetched
µ
PD754144
CL1 CL2 VSS
µ
• PD754144
µ
• PD754244
µ
PD754244
X1 X2 VSS
(3) Divider circuit
The divider circuit divides the output of the system clock oscillator to create various clock signals.