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CHAPTER 6 PERIPHERAL HARDWARE FUNCTION
115
User’s Manual U10676EJ3V0UM
6.3.2 Basic interval timer mode register (BTM)
BTM is a 4-bit register that controls the operation of the basic interval timer (BT).
This register is set by a 4-bit memory manipulation instruction.
Bit 3 of BT can be manipulated by a bit manipulation instruction.
Example To set the interrupt generation interval of the
µ
PD754244 to 1.37 ms (at fX = 6.0 MHz)
Note
SEL MB15 ; or CLR1 MBE
CLR1 WDTM
MOV A, #1111B
MOV BTM,A ; BTM ← 1111B
Note It is 1.95 ms when the
µ
PD754244 is operating at fX = 4.19 MHz.
In the case of
µ
PD754144, it is fixed to 2
9
/fCC (512
µ
s at 1.0 MHz).
When bit 3 of this register is set to “1”, the contents of BT are cleared, and at the same time, the basic interval
timer/watchdog timer interrupt request flag (IRQBT) is cleared (the basic interval timer/watchdog timer is started).
When the RESET signal is asserted, the contents of this register are cleared to “0”, and the generation interval
time of the interrupt request signal is set to the longest value.