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CHAPTER 6 PERIPHERAL HARDWARE FUNCTION
143
User’s Manual U10676EJ3V0UM
Figure 6-34. Configuration When Timer Counter Operates
MPX
Internal clock
Timer counter modulo register (TMODn)
Comparator
Timer counter count register (Tn)
CP
TOUT F/F
PTOn
Coinci-
dence
Clear
INTTn
(lRQTn set signal)
Figure 6-35. Count Operation Timing
Count pulse (CP)
Timer counter modulo
register (TMODn)
Timer counter count
register (Tn)
TOUT F/F
01 2 m–1m 0 1 2 m–1m01234
m
Match Match
Reset
Timer start command
Remark m: Set value of timer counter modulo register
n : 0 to 2