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CHAPTER 6 PERIPHERAL HARDWARE FUNCTION
144 User’s Manual U10676EJ3V0UM
(4) Application of 8-bit timer counter mode
As an interval timer that generates an interrupt at 50 ms intervals
Note
• Set the higher 4 bits of the timer counter mode register (TMn) to 0100B, and select 62.5 ms (at fX =
4.19 MHz of
µ
PD754244) as the longest set time.
• Set the lower 4 bits of TMn to 1100B.
• The set value of the timer counter modulo register (TMODn) is as follows:
= 205 CDH
<Program example>
SEL MB15 ; or CLR1 MBE
MOV XA, #0CCH
MOV TMODn, XA ; Sets modulo
MOV XA, #01001100B
MOV TMn, XA ; Sets mode and starts timer
EI ; Enables interrupt
EI IETn ; Enables timer interrupt
Note This example applies to the operation of the
µ
PD754244 at fX = 4.19 MHz. With fX = 6.0 MHz operation
of the
µ
PD754244 and fCC = 1.0 MHz operation of the
µ
PD754144, the longest set time and the interval
time are different even if the settings are the same.
Remark n = 0 to 2
244
µ
s
50 ms