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CHAPTER 3 FEATURES OF ARCHITECTURE AND MEMORY MAP
58 User’s Manual U10676EJ3V0UM
Figure 3-7.
µ
PD754244 I/O Map (7/8)
Hardware name (symbol)
Number of bits that
Bit
Address R/W
can be manipulated
manipulation Remarks
b3 b2 b1 b0 1-bit 4-bit 8-bit
addressing
FE0H Unmounted
to
FE7H
FE8H
PM33 PM32 PM31 PM30
R/W
– –
Port mode register group A (PMGA)
PM63
Note
PM62
Note
PM61
Note
PM60
Note
FEAH Unmounted
to
FEDH
FEEH
–––PM8
Note
R/W –– – A write to an unmounted area is invalid, and
Port mode register group C (PMGC) the read value is undefined.
––––
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Note These are not registered as reserved words.
However, bit manipulation is possible by using 0FE9.0 to 0FE9.3.