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CHAPTER 3 FEATURES OF ARCHITECTURE AND MEMORY MAP
42 User’s Manual U10676EJ3V0UM
(b) Specific address bit register indirect addressing (pmem, @L)
This addressing mode is to indirectly specify and successively manipulate the bits of the peripheral
hardware units such as I/O ports. The data memory addresses to which this addressing mode can be
applied are FC0H to FFFH.
This addressing mode specifies the higher 10 bits of a 12-bit data memory address directly by using an
operand, and the lower 2 bits by using the L register.
This addressing mode can also be used independently of the setting of MBE and MBS.
Example To output pulses to the respective bits of port 6
P60
P61
P63
P62
LOOP2 : MOV L, #0
LOOP1 : SET1 PORT6.@L; Bits of port 6 (L1-0) ← 1
CLR1 PORT6.@L; Bits of port 6 (L1-0) ← 0
INCS L
SKE L, #4H
BR LOOP1
BR LOOP2