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CHAPTER 4 INTERNAL CPU FUNCTION
72 User’s Manual U10676EJ3V0UM
Figure 4-9. Data Saved to Stack Memory (MkI Mode)
Stack
SP – 1
SP
PUSH instruction
Stack
PC11-PC8
PC3-PC0
PC7-PC4
CALL, CALLF instruction
Stack
Interrupt
SP – 2
SP – 1
SP
SP – 3
PC11-PC8
PC3-PC0
PC7-PC4
SP – 2
SP – 1
SP
SP – 3
SP – 4
SP – 5MBE RBE
00
MBE RBE
00
CY SK2
MBE RBE
SK1 SK0
IST0IST1
PSW
SP – 2
Register pair, low
Register pair, high
SP – 4 SP – 6
Figure 4-10. Data Restored from Stack Memory (MkI Mode)
Stack
SP + 1
SP + 2
POP instruction
Stack
PC11-PC8
PC3-PC0
PC7-PC4
RET, RETS instruction
Stack
RETI instruction
SP + 2
SP + 3
SP + 4
SP + 1
PC11-PC8
PC3-PC0
PC7-PC4
SP + 4
SP + 5
SP + 6
SP + 3
SP + 2
SP + 1MBE RBE
00
MBE RBE
00
CY SK2
MBE RBE
SK1 SK0
IST0IST1
PSW
SP
Register pair, low
Register pair, high
SP
SP