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CHAPTER 6 PERIPHERAL HARDWARE FUNCTION
95
User’s Manual U10676EJ3V0UM
Figure 6-10. Format of Each Port Mode Register
Specification
0 Input mode (output buffer off)
1 Output mode (output buffer on)
Port mode register group A
765432
10
PM30PM31PM33 PM32PM60PM61PM62PM63
Address
PMGA
FE8H
Symbol
Sets P30 to input or output mode
Sets P31 to input or output mode
Sets P32 to input or output mode
Sets P33 to input or output mode
Sets P60 to input or output mode
Sets P61 to input or output mode
Sets P62 to input or output mode
Sets P63 to input or output mode
Port mode register group C
765432
10
PM8–––––––
Address
PMGC
FEEH
Symbol
Sets port 8 (P80) to input or output mode