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Appendix D Register Map and Descriptions
© National Instruments Corporation D-39 Lab-PC+ User Manual
Interval Counter Data Register
The Interval Counter Data Register is loaded with the desired number of samples of a single
channel that will be acquired between intervals. See Programming Multiple A/D Conversions in
Single-Channel Interval Acquisition Mode in Appendix E, Register-Level Programming, for a
description of the programming sequence.
Address: Base address + 1E (hex)
Type: Write-only
Word Size: 8-bit
Bit Map:
76543210
D7 D6 D5 D4 D3 D2 D1 D0
Bit Name Description
7-0 D<7..0> Interval Counter count.