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Chapter 4 Theory of Operation
© National Instruments Corporation 4-11 Lab-PC+ User Manual
All three ports on the 8255A are TTL-compatible. When enabled, the digital output ports are
capable of sinking 2.4 mA of current and sourcing 2.6 mA of current on each digital I/O line.
When the ports are not enabled, the digital I/O lines act as high-impedance inputs.
Timing I/O Circuitry
The Lab-PC+ uses two 8253 Counter/Timer integrated circuits for data acquisition timing and for
general-purpose timing I/O functions. One of these is used internally for data acquisition timing,
and the other is available for general use. Figure 4-6 shows a block diagram of both groups of
timing I/O circuitry (counter groups A and B).