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Appendix E Register-Level Programming
© National Instruments Corporation E-9 Lab-PC+ User Manual
1. Select analog input channel, gain, and timebase for Counter A0.
The analog input channel and gain are selected by writing to the A/D Configuration Register.
The SCANEN bit must be cleared for data acquisition operations on a single channel. See
the Command Register 1 bit description earlier in this chapter for gain and analog input
channel bit patterns. If Counter B0 is being used as a timebase for Counter A0, then the
TBSEL bit in Command Register 1 should be set at this time.
Command Register 1 needs to be written to only when the analog input channel, gain setting,
or other function needs to be changed.
2. Program Counter B0 (if necessary).
The following sequence should be used to program Counter B0 if it is being used. If
Counter B0 is not being used, skip to step 3. All writes are 8-bit write operations. All values
given are hexadecimal.
a. Write 36 to the Counter B Mode Register (select Mode 3).
b. Write the least significant byte of the timebase count to the Counter B Data Register.
c. Write the most significant byte of the timebase count to the Counter B Data Register. For
example, programming a timebase of 10 µs requires a timebase count of
10 µs
0.5 µs
=20
3. Program the sample interval counter (Counter A0).
Counter A0 of the 8253(A) Counter/Timer is used as the sample interval counter. A high-to-
low transition on OUT0 (Counter A0 output) initiates a conversion. Counter A0 can be
programmed to generate a pulse once every N µs. N is referred to as the sample interval, that
is, the time between successive A/D conversions. N can be between 2 and 65,535. The
sample interval is equal to the period of the timebase clock used by Counter A0 multiplied by
N. A 1 MHz clock is internally connected to CLK0 (the clock used by Counter A0).
Use the following programming sequence to program Counter A0, the sample interval
counter. All writes are 8-bit write operations. All values given are hexadecimal.
a. Write 34 to the Counter A Mode Register (select Counter A0, Mode 2).
b. Write the least significant byte of the sample interval to the Counter A0 Data Register.
c. Write the most significant byte of the sample interval to the Counter A0 Data Register.